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Talk on ‘Compute Scaling Beyond the finFET Era: The Road to CMOS 2.0’

Compute Scaling Beyond the finFET Era: The Road to CMOS 2.0

Date: 15 July 2024, Monday

Time: 9 am to 10 am 

Venue: NUS, CDE E7 Building, Level 3, Seminar Room 4, 15 Kent Ridge Crescent, Singapore 119672 

SHINE extends its heartfelt appreciation to Dr. Julien Ryckaert, Vice President of Logic Technologies at imec, for his visit to NUS and delivering a talk titled “Compute Scaling Beyond the finFET Era: The Road to CMOS 2.0” on 15 July 2024.

Dr. Ryckaert shared that as we enter the nanosheet era, the semiconductor industry realizes that it will not be on a smooth scaling curve for CMOS. New device architectures, BEOL scaling boosters, backside technology, 3D partitioning, and heterogeneous integration will all be instrumental in shaping the future scaling roadmap.

At the end of the talk, Dr. Ryckaert emphasized that the diversity and scaling out of future compute systems require a holistic approach to scaling, driven by System-Technology Co-Optimization.

The audience showed considerable interest and enthusiasm, engaging in a lively exchange of questions both during and after the presentation.

HL- Dr Julien with audience sonu, jin feng etc -Q&A
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